The generic layer provides a set of pre-defined irq-flow methods:
handle_level_irq
handle_edge_irq
handle_simple_irq
handle_percpu_irq
The interrupt flow handlers (either predefined or architecture specific) are assigned to specific interrupts by the architecture either during bootup or during device initialization.
The helper functions call the chip primitives and are used by the default flow implementations. The following helper functions are implemented (simplified excerpt):
default_enable(irq)
{
desc->chip->unmask(irq);
}
default_disable(irq)
{
desc->chip->mask(irq);
}
default_ack(irq)
{
chip->ack(irq);
}
default_mask_ack(irq)
{
if (chip->mask_ack) {
chip->mask_ack(irq);
} else {
chip->mask(irq);
chip->ack(irq);
}
}
noop(irq)
{
}
handle_level_irq provides a generic implementation for level-triggered interrupts.
The following control flow is implemented (simplified excerpt):
desc->chip->start(); handle_IRQ_event(desc->action); desc->chip->end();
handle_edge_irq provides a generic implementation for edge-triggered interrupts.
The following control flow is implemented (simplified excerpt):
if (desc->status & running) {
desc->chip->hold();
desc->status |= pending | masked;
return;
}
desc->chip->start();
desc->status |= running;
do {
if (desc->status & masked)
desc->chip->enable();
desc-status &= ~pending;
handle_IRQ_event(desc->action);
} while (status & pending);
desc-status &= ~running;
desc->chip->end();
handle_simple_irq provides a generic implementation for simple interrupts.
Note: The simple flow handler does not call any handler/chip primitives.
The following control flow is implemented (simplified excerpt):
handle_IRQ_event(desc->action);
handle_percpu_irq provides a generic implementation for per CPU interrupts.
Per CPU interrupts are only available on SMP and the handler provides a simplified version without locking.
The following control flow is implemented (simplified excerpt):
desc->chip->start(); handle_IRQ_event(desc->action); desc->chip->end();
The generic functions are intended for 'clean' architectures and chips, which have no platform-specific IRQ handling quirks. If an architecture needs to implement quirks on the 'flow' level then it can do so by overriding the highlevel irq-flow handler.
This per interrupt selectable feature, which was introduced by Russell King in the ARM interrupt implementation, does not mask an interrupt at hardware level when irq_disable() is called. The interrupt is kept enabled and is masked in the flow handler when a interrupt event happens. This prevents losing edge interrupts on hardware which does not store an edge interrupt event while the interrupt is disabled at hardware level. When an interrupt arrives while the irq_desc status IRQ_DISABLED flag is set, then the interrupt is masked at hardware level and the IRQ_PENDING bit is set in the irq_desc status field. When the interrupt is reenabled by irq_enable() the pending bit is checked and the interrupt is resent either by hardware or by a software resend mechanism. It's necessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to use the delayed interrupt disable feature and your hardware is not capable of retriggering an interrupt. The delayed interrupt disable can be runtime enabled per interrupt by setting the IRQ_DELAYDISABLE flag in the irq_desc status field.